Simulated high-q inductor



Oct. 6, 1964 J. F. BOGUSZ ETAL 3,152,309

SIMULATED HIGH-Q INDUCTQR Filed Aug. 23. 1960 E5 l /Z6 INVENTORS Y JOHN E 8060.52 an 2am 171' 7' DRIVE United States Patent 3,152,309 SIMULATED HIGH-Q INDUCTOR John F. Bogusz and Louis Gugliotti, Philadelphia, Pa,

assignors, by niesne assignments, to Philco Corporation, Philadelphia, Pa., a corporation of Delaware Filed Aug. 23, 1960, Ser. No. 51,443 4 Claims. (Cl. 333-80) This invention relates to simulated inductors and more particularly to the simulation of a high-Q inductor.

It is sometimes desired to simulate an inductance through the use of a transistor as an active element with feedback circuitry adjusted so as to yield between a pair of terminals a net impedance which apears to be inductive. For example, in the miniaturization of circuits toward which there is an increasing trend, it is desirable to simulate an inductance in view of the fact that miniaturization of an actual inductor cannot be readily accomplished.

It is possible to simulate an inductor by means of a simple combination of a transistor and an associated RC feedback arrangement as hereinafter more particularly described. However, the simulated inductor thus provided has low Q, and it cannot be employed where high Q is essential as it often is. Therefore there has existed an urgent need for simple simulation of a high-Q inductor.

The principal object of the present invention is to supply such need and to provide a simple and inexpensive simulated high-Q inductor.

We have discovered that in a simulated inductor comprising a transistor and an associated RC feedback arrangement, it is possible to impart high Q thereto by the simple provision of alow-Q inductor. Thus high Q may be imparted to such a simulated inductor by the provision of a low-Q coil in the emitter connection. This led to the concept that since this result can be achieved by means of a low-Q inductor, it is possible to employ as such inductor a transistor-simulated inductor which itself has low Q. There thus evolved the preferred form of this invention in which high Q is imparted to a transistor-simulated inductor by means of a second transistorsimulated inductor.

The invention may be fully understood from the following detailed description with reference to the accompanying drawing wherein FIG. 1 is a schematic illustration of a transistorsimulated inductor embodying one form of the present invention;

FIGS. 2 and 3 are explanatory vector diagrams; and

FIG. 4 is a schematic illustration of a transistorsirnulated inductor embodying the preferred form of this invention.

Referring first to FIG. 1, there is shown a transistor and an associated RC feedback arrangement comprising resistor 11 and capacitor 12, which together simulate an inductor. As shown, the feedback resistor 11 is connected between the collector and the base of the transistor, and capacitor 12 is connected between the base of the transistor and ground. A resistor 13 may be included in the emitter connection to increase the input impedance so that the impedance from base to ground is primarily capacitive. The usual load resistor and voltage supply are shown at 14 and 15. Terminals, 16 and 17 are connected respectively to the collector and to ground, by which the simulated inductor can be connected into any circuit in which it is to be employed.

Disregarding the coil 18 for the moment and assuming that there is a direct connection between resistor 13 and ground, FIG. 2 shows the vector diagram for the circuit. Since the feedback current I; is small compared to the collector current 1 the output current I is essentially equal to the collector current 1,. The vector dia- 3,152,3h9 Patented Oct. 6, 1964 gram shows that the collector current I lags the collector voltage V and therefore the circuit simulates an inductor. However, the angle of lag is substantially less than and therefore the inductor simulated by the circuit has low Q.

Still assuming absence of coil 1%, experimentation has shown that high Q cannot be obtained with the circuit of FIG. 1. Conditions for high Q dictate that the capacitive reactance from base to ground must be very small compared to the input impedance of the transistor. But with such small capacitive reactance only a small lagging component of current is produced in the collector circuit. If the value of the capacitor is changed so as to increase the capacitive reactance and thus increase the collector current, the angle of lag is decreased resulting in still lower Q.

The present invention is based on the discovery that it is possible to impart high Q to such a simulated inductor by means of a low Q inductor (e.g. a coil with a Q of about 1). Thus in FIG. 1 a low-Q coil 18 is included in the emitter connection for this purpose. FIG. 3 shows the resulting vector diagram. The effect of the coil 18 is to cause the base current l to lag the base voltage V so that the base current is substantially in phase quadrature relation with the collector voltage V Since the collector current is substantially in phase with the base current, it also is substantially in phase quadrature relation with the collector voltage. Thus the simulated inductor now has the desired high-Q.

The phase relation between the collector current and the collector voltage will depend on the inductance value of coil 18. By increasing such value beyond that required to give a phase quadrature relation, the collector current can be caused to lag the collector voltage by more than 90. In this Way it is possible to obtain a negative resistance component which can be used to reduce external circuit losses and which can be adjusted to produce self-oscillation at a frequency determined by the simulated inductance and by external tuning capacitance (not shown) connected between terminals 16 and 17.

Referring now to FIG. 4, there is shown a simulated inductor consisting of a first transistor 19 and an associated RC feedback arrangement comprising resistor 26 and capacitor 21, as in FIG. 1. However, instead of employing a low Q coil to impart high Q to the simulated inductor, a second transistor simulated inductor is connected between the emitter of transistor 19 and ground. The second transistor-simulated inductor comprises a second transistor 22 and an associated RC feedback arrangement comprising resistor 23 and capacitor 24. This simulated inductor has low Q since its operating characteristics are the same as depicted in FIG. 2. It is therefore comparable to the low Q coil 13 in PEG. 1, and it serves the same purpose of imparting high Q to the inductor simulated by transistor 19 and its associated RC feedback arrangement. Thus the overall circuit simulates a high-Q inductor between terminals 25 and 26, which has the same operating characteristics as depicted in FIG. 3.

The circuit of FIG. 4 has the advantage that it does not require the use of any coil. It therefore lends itself to miniaturization, since it is readily possible to miniaturize transistors, resistors and capacitors, but it is not readily possible to miniaturize a coil. However, the circuit of FIG. 1 is useful Where a low-Q coil is permissible.

Like the circuit of FIG. 1, the circuit of FIG. 4 can be made to oscillate at a frequency determined by the simulated inductance and by external tuning capacitance connected between terminals 25 and 26. By adjusting the feedback parameters 23 and 24 the simulated inducincreased to obtain a negative resistance component which can be used to reduce external circuit losses or the produce self oscillation.

In experimental practice of this invention, satisfactory operation has been achieved in simulating inductance values ranging from 100 microhenrys to several millihenrys, with Q values up to 40.

This invention is applicable in any instance where a simulated inductance is desired and it is also useful to produce oscillations. For example, in one experimental application the circuit of FIG. 4 was used in an IF amplifier of a radio receiver, and in another application the circuit was made to produce oscillations at approximately 600 kc.

While certain embodiments of the invention have been illustrated and described, it is to be understood that the invention is not limited thereto but contemplates such modifications and further embodiments as may occur to those skilled in the art.

We claim:

1. A high-Q inductance simulating circuit, comprising a transistor having an input electrode, an output electrode, and an electrode common to the circuits of said input and output electrodes, resistance means connected between said input and output electrodes to provide signal coupling therebetween, capacitive means included in the input circuit between said input electrode and said common electrode, an output load in circuit with said output electrode and said common electrode, said circuit as thus far defined tending to simulate a low-Q inductor by reason of the fact that the output current tends to lag the output electrode voltage by an angle of lag substantially less than 90, and means for imparting high Q to said circuit comprising low-Q inductive means connected to said common electrode and in comon circuit with said input and output electrodes for increasing said angle of lag, said inductive means comprising a transistor circuit simulating a low-Q inductor.

2. A circuit according to claim 1, wherein said transistor circuit comprises a transistor having an input electrode, and an output electrode, and an electrode common to the circuits of said input and output electrodes, resistance means connected between said input and output electrodes, and capacitive means connected between said input electrode and said common electrode.

3. A high-Q inductance simulating circuit, comprising a transistor having a base electrode, a collector electrode, and an emitter electrode common to the circuits of said base and collector electrodes, resistance means connected between said base and collector electrodes to provide signal coupling therebetween, capacitive means included in the input circuit between said base and emitter electrodes, an output load in circuit with said collector and emitter electrodes, said circuit as thus far defined tending to simulate a low-Q inductor by reason of the fact that the output current tends to lag the collector electrode voltage by an angle of lag substantially less than 90, and means for imparting high Q to said circuit comprising low-Q inductive means connected to said emitter electrode and in common circuit with said base and collector electrodes for increasing said angle of lag, said inductive means comprising a transistor circuit simulating a low-Q inductor.

4. A circuit according to claim 3, wherein said transistor circuit comprises a transistor having a base electrode, a collector electrode and an emitter electrode common to the circuits of said base and collector electrodes, resistance means connected between said base and collector electrodes, and capacitive means connected between said base and emitter electrodes.

References Cited in the'file of this patent UNITED STATES PATENTS i i i i 

1. A HIGH-Q INDUCTANCE SIMULATING CIRCUIT, COMPRISING A TRANSISTOR HAVING AN INPUT ELECTRODE, AN OUTPUT ELECTRODE, AND AN ELECTRODE COMMON TO THE CIRCUITS OF SAID INPUT AND OUTPUT ELECTRODES, RESISTANCE MEANS CONNECTED BETWEEN SAID INPUT AND OUTPUT ELECTRODES TO PROVIDE SIGNAL COUPLING THEREBETWEEN, CAPACITIVE MEAN INCLUDED IN THE INPUT CIRCUIT BETWEEN SAID INPUT ELECTRODE AND SAID COMMON ELECTRODE, AN OUTPUT LOAD IN CIRCUIT WITH SAID OUTPUT ELECTRODE AND SAID COMMON ELECTRODE, SAID CIRCUIT AS THUS FAR DEFINED TENDING TO SIMULATE A LOW-Q INDUCTOR BY REASON OF THE FACT THAT THE OUTPUT CURRENT TENDS TO LAG THE OUTPUT ELECTRODE VOLTAGE BY AN ANGLE OF LAG SUBSTANTIALLY LESS THAN 90*, AND MEANS FOR IMPARTING HIGH Q TO SAID CIRCUIT COMPRISING LOW-Q INDUCTIVE MEANS CONNECTED TO SAID COMMON ELECTRODE AND IN COMON CIRCUIT WITH SAID INPUT AND OUTPUT ELECTRODES FOR INCREASING SAID ANGLE OF LAG, SAID INDUCTIVE MEANS COMPRISING A TRANSISTOR CIRCUIT SIMULATING A LOW-Q INDUCTOR. 